july 2002 1/7 this is preliminary information on a new product now in development. details are subject to change without notice. rev. 1.7 st7flite2 8-bit mcu with single voltage flash memory, data eeprom, adc, timers, spi data briefing n memories C 8 kbytes single voltage extended flash (xflash) program memory with read-out pro- tection, in-circuit programming and in-appli- cation programming (icp and iap) C 384 bytes ram C 256 bytes data eeprom with read-out pro- tection n clock, reset and supply management C enhanced reset system C enhanced low voltage supervisor (lvd) for main supply and an auxiliary voltage detector (avd) with interrupt capability for implement- ing safe power-down procedures C clock sources: internal 1% rc oscillator, crystal/ceramic resonator or external clock C internal 32-mhz input clock for auto-reload timer C optional x4 or x8 pll for 4 or 8 mhz internal clock C five power saving modes: halt, active-halt, wait and slow, auto wake up from halt n i/o ports C up to 15 multifunctional bidirectional i/o lines C7 high sink outputs n 2 timers C 8-bit lite timer with prescaler, watchdog, 1 realtime base and 1 input capture C one 12-bit auto-reload timer with 4 pwm outputs, input capture and output compare functions n 1 communication interface C spi synchronous serial interface n interrupt management C 10 interrupt vectors plus trap and reset C 15 external interrupt lines (on 4 vectors) n a/d converter C 7 input channels C fixed gain op-amp C 13-bit resolution for 0 to 430 mv (@ 5v v dd ) C 10-bit resolution for 430 mv to 5v (@ 5v v dd ) n instruction set C 8-bit data manipulation C 63 basic instructions C 17 main addressing modes C 8 x 8 unsigned multiply instructions n development tools C full hardware/software development package C icd (debug module) device summary dip20 so20 300 features st7flite20 st7flite25 st7flite29 program memory - bytes 8k ram (stack) - bytes 384 (128) data eeprom - bytes - - 256 peripherals lite timer with watchdog, autoreload timer, spi, 10-bit adc with op-amp lite timer with watchdog, autoreload timer with 32-mhz input clock, spi, 10-bit adc with op-amp operating supply 2.4v to 5.5v cpu frequency up to 8mhz (w/ ext osc up to 8mhz) up to 8mhz (w/ ext osc up to 8mhz and int 1mhz rc 1% pllx8/4mhz) operating temperature -40c to +85c packages so20 300, dip20 1
st7flite2 2/7 1 introduction the st7flite2 is a member of the st7 microcon- troller family. all st7 devices are based on a com- mon industry-standard 8-bit core, featuring an en- hanced instruction set. the st7flite2 features flash memory with byte-by-byte in-circuit programming (icp) and in- application programming (iap) capability. under software control, the st7flite2 device can be placed in wait, slow, or halt mode, re- ducing power consumption when the application is in idle or standby state. the enhanced instruction set and addressing modes of the st7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. in addition to standard 8-bit data management, all st7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. the devices feature an on-chip debug module (dm) to support in-circuit debugging (icd). for a description of the dm registers, refer to the st7 icc protocol reference manual. figure 1. general block diagram 8-bit core alu address and data bus osc1 osc2 reset port a internal clock control ram (384 bytes) pa7:0 (8 bits) v ss v dd power supply program (8k bytes) lvd memory pll x 8 ext. 1mhz pll int. 1mhz 8-bit lite timer 2 port b spi pb6:0 (7 bits) data eeprom ( 256 bytes) 1% rc osc to 16mhz adc + opamp 12-bit auto-reload timer 2 clkin / 2 or pll x4 8mhz -> 32mhz watchdog 1
st7flite2 3/7 2 pin description figure 2. 20-pin so package pinout (st7flite2x) figure 3. 20-pin dip package pinout (st7flite2x) 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 v ss v dd ain5/pb5 clkin/ain4/pb4 mosi/ain3/pb3 miso/ain2/pb2 sck/ain1/pb1 ss /ain0/pb0 osc1 osc2 pa5 (hs)/atpwm3/iccdata pa4 (hs)/atpwm2 pa3 (hs)/atpwm1 pa2 (hs)/atpwm0 pa1 (hs)/atic pa0 (hs)/ltic (hs) 20ma high sink capability eix associated external interrupt vector 12 11 9 10 ain6/pb6 pa7(hs) pa6/mco/iccclk/break reset ei3 ei2 ei0 ei1 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 miso/ain2/pb2 mosi/ain3/pb3 atpwm2/pa4(hs) atpwm3/iccdata/pa5(hs) mco/iccclk/break/pa6 pa7(hs) ain6/pb6 ain5/pb5 sck/ain1/pb1 ss /ain0/pb0 pa0(hs)/ltic osc2 osc1 v ss v dd reset (hs) 20ma high sink capability eix associated external interrupt vector 12 11 9 10 atpwm1/pa3(hs) pa2(hs)/atpwm0 pa1(hs)/atic clkin/ain4/pb4 ei3 ei3 ei2 ei1 ei0 ei0 1
st7flite2 4/7 pin description (contd) legend / abbreviations for table 1 : type: i = input, o = output, s = supply in/output level: c t = cmos 0.3v dd /0.7v dd with input trigger output level: hs = 20ma high sink (on n-buffer only) port and control configuration: C input: float = floating, wpu = weak pull-up, int = interrupt, ana = analog C output: od = open drain, pp = push-pull the reset configuration of each pin is shown in bold which is valid as long as the device is in reset state. table 1. device pin description pin no. pin name type level port / control main function (after reset) alternate function so20 (st7flite2x) dip20 (st7flite2x) input output input output float wpu int ana od pp 116v ss s ground 217v dd s main power supply 3 18 reset i/o c t xx top priority non maskable interrupt (active low) 4 19 pb0/ain0/ss i/o c t x ei3 xxx port b0 adc analog input 0 or spi slave select (active low) 5 20 pb1/ain1/sck i/o c t x xxx port b1 adc analog input 1 or spi se- rial clock 6 1 pb2/ain2/miso i/o c t x xxx port b2 adc analog input 2 or spi master in/ slave out data 7 2 pb3/ain3/mosi i/o c t x ei2 xxx port b3 adc analog input 3 or spi master out / slave in data 8 3 pb4/ain4/clkin i/o c t x xxx port b4 adc analog input 4 or exter- nal clock input 9 4 pb5/ain5 i/o c t x xxx port b5 adc analog input 5 10 5 pb6/ain6 i/o c t x xxx port b6 adc analog input 6 11 6 pa7 i/o c t hs x ei1 xx port a7 12 7 pa6 /mco/ iccclk/break i/o c t x xx port a6 main clock output or in circuit communication clock or ex- ternal break 13 8 pa5 /atpwm3/ iccdata i/o c t hs x xx port a5 auto-reload timer pwm3 or in circuit communication data 14 9 pa4/atpwm2 i/o c t hs x xx port a4 auto-reload timer pwm2 1
st7flite2 5/7 15 10 pa3/atpwm1 i/o c t hs x ei0 xx port a3 auto-reload timer pwm1 16 11 pa2/atpwm0 i/o c t hs x xx port a2 auto-reload timer pwm0 17 12 pa1/atic i/o c t hs x xx port a1 auto-reload timer input cap- ture 18 13 pa0/ltic i/o c t hs x xx port a0 lite timer input capture 19 14 osc2 o resonator oscillator inverter output 20 15 osc1 i resonator oscillator inverter input pin no. pin name type level port / control main function (after reset) alternate function so20 (st7flite2x) dip20 (st7flite2x) input output input output float wpu int ana od pp 1
st7flite2 6/7 3 package characteristics 3.1 package mechanical data figure 4. 20-pin plastic small outline package, 300-mil width figure 5. 20-pin plastic dual in-line package, 300-mil width package outline (-) dim. mm inches min typ max min typ max a 2.35 2.65 0.093 0.104 a1 0.10 0.30 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 12.60 13.00 0.496 0.512 e 7.40 7.60 0.291 0.299 e 1.27 0.050 h 10.00 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 a 0 8 0 8 l 0.40 1.27 0.016 0.050 number of pins n 20 eh a a1 b e d c h x 45 l a dim. mm inches min typ max min typ max a 5.33 0.210 a1 0.38 0.015 a2 2.92 3.30 4.95 0.115 0.130 0.195 b 0.36 0.46 0.56 0.014 0.018 0.022 b2 1.14 1.52 1.78 0.045 0.060 0.070 c 0.20 0.25 0.36 0.008 0.010 0.014 d 24.89 26.16 26.92 0.980 1.030 1.060 d1 0.13 0.005 e 2.54 0.100 eb 10.92 0.430 e1 6.10 6.35 7.11 0.240 0.250 0.280 l 2.92 3.30 3.81 0.115 0.130 0.150 number of pins n 20 e1 d d1 b e a a1 l a2 c eb 11 10 1 20 b2
st7flite2 7/7 notes: information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without the express written approval of stmicroele ctronics. the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - all rights reserved. purchase of i 2 c components by stmicroelectronics conveys a license under the philips i 2 c patent. rights to use these components in an i 2 c system is granted provided that the system conforms to the i 2 c standard specification as defined by philips. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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